Thirumalai Naicker Palace, Madurai


This is the view of thirumalai naicker palace at Madurai. This place is of one of the interesting things for the foreigners.
This mahal is renovated now and it is ready for the light and sound show. the cost for visiting the palace is Rs.10 which includes a visit to museum inside.

The seating in this pic is for the peoples who visits this palace for a light and sound show. The history of the pandia king is narrated here with light and sound. Both English and Tamil versions are available.

Enjoy some of the pics of the Tirumalai Naicker Palace at Madurai


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Concurrency Control Issues

  • Pessimistic Concurrency Control
    • The transactions are been checking for violating the serialization consistency before letting it execute is called pessimistic concurrency control
      • Two phase locking Scheme
        • Read /Write lock as a phase
        • Unlock – another phase
        • Both the above phases wont interleave, because of this, there may be deadlock, which can be detected by means of deadlock detection algorithm and if deadlock is there, one of the transactions is aborted with the nearer timestamp.
      • Multiversion Scheme
        • There are three locks Read, Write and Certify
        • Read lock – Read the needed data from the database
        • Write lock – Writing to its own private space
        • Certify lock – Updates to the database, this stage is the committed stage.

      General locking Rules

Lock Already Set

Lock Requested

Read

Write

Certify

Read

Granted

Granted

Blocked

Write

Granted

Granted

Granted

Certify

Blocked

Granted

Blocked

 

Locking rules for priority Inversion

Lock Already Set by a Low Priority Transaction

Lock Requested by a High Priority Transaction

Read

Write

Certify

Read

Granted

L-Aborted

Can’t Occur*

Write

Granted/Blocked#

Granted

Granted

Certify

Conversion

Granted

Conversion

In the above table,

L-Aborted – Low Priority Transaction Aborted

Conversion – Low Priority Transaction is converted to write lock

* – already the transaction is aborted, so no reading lock set.

 

If we reduce transaction abortion, then in the above table, L-aborted may be when the HPT requesting the certify lock, while the HPT requesting Write lock which will be granted.

 

Lock Already Set by a High Priority Transaction

Lock Requested by a Low Priority Transaction

Read

Write

Certify

Read

Granted

Granted

Blocked

Write

Blocked

Granted

Granted/Blocked#

Certify

Blocked

Granted

Blocked

# – depending on the implementaion

 

  • Optimistic Concurrency Control
    • The transactions are first allowed to run, after that they are checked for violating the Serialization Consistency
      • Read Phase
        • Reads from the database and writes to its own private address space
      • Validation Phase
        • Checked for violating the serialization consistency.
      • Write Phase (if needed)
        • If the Serialization consistency is not violated in the above phase, then this phase is needed to update to the database
    • So this method is optimistic in the sense that, the transaction are execute and put into the private address space where it is checked for violating the serialization consistency.
    • A and T are two transactions where A’s timestamp precedes T’s timestamp. The serialization consistency is not violated due to T if the following conditions are true.
      • A has completed its write phase before T starts its read phase.
      • The write set of A is distinct from both the read and write set of T.
    • If the above conditions are not satisfied, then T will be aborted as its timestamp is nearer.

Transaction Abortions

Transaction Abortions

Transaction abortion is of two types, either

  • Termination abortion or
    • The Transaction which is aborted in this way won’t be restarted
    • Example: An attempt to divide by zero error
  • Non Termination Abortion
    • The transaction which will be restarted after it is being aborted
    • Example: data conflict due to a deadlock, If two transactions are involved in a deadlock, one of the transaction will be aborted and will be restarted

Simulation of Synchronous and Asynchronous counters

Requirements:

  • WARP
  • Active HDL
  • Cool Runner and Fitter CPLD Kit

Program for Asynchronous counter:
Library ieee;
Use ieee.std_logic_1164.all;
entity asyn_counter is
port (
clk: in BIT;
ce: in BIT;
clear: in BIT;
load: in BIT;
dir: in BIT;
p: in INTEGER range 0 to 255;
qd: out INTEGER range 0 to 255
);
end asyn_counter;
architecture asyn_counter of asyn_counter is
begin
process(clk,clear,load)
variable count : integer range 0 to 255;
begin
if(clear = ‘0’) then
count := 0;
elsif(load = ‘1’ and clear = ‘1’) then
if(ce = ‘1’ and dir = ‘0’) then
count := count + 0;
elsif(ce = ‘1’ and dir = ‘1’) then
count := count + 1;
end if;
end if;
qd <= count;
end process;
end asyn_counter;

Asynchronous counter

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Synchronous Counter

Program for Synchronous Counter
library IEEE;
use IEEE.std_logic_1164.all;
entity syn_counter is
port (
clk: in STD_LOGIC;
ce: in STD_LOGIC;
clear: in STD_LOGIC;
load: in STD_LOGIC;
direction: in STD_LOGIC;
pre_value: in INTEGER range 0 to 15;
output: out INTEGER range 0 to 15
);
end syn_counter;
architecture syn_counter of syn_counter is
begin
process(clk)
variable temp: integer range 0 to 15;
begin
if(rising_edge(clk)) then
if(clear = ‘0’) then
temp := 0;
elsif(load = ‘1’) then
temp := pre_value;
elsif(ce=’1′ and direction = ‘0’) then
temp := (temp -1) mod 16;
elsif(ce = ‘1’ and direction = ‘1’) then
temp := (temp +1) mod 16;
end if;
end if;
output <= temp;
end process;
end syn_counter;

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